Physical Unclonable Functions are one-way functions based on small and
uncontrolled manufacturing variations in silicon devices. They have
been studied as a potential solution to substrate-specific security
problems, such as device-unique cryptographic-key generation, and
device authentication. This talk addresses some of the challenges that
must be overcome to move PUFs out of the lab, beyond the stage of
research vehicle.
A key challenge is quality-control of a PUF design. A PUF is not just
a circuit. Instead, it's a probabilistic device, in the same realm as
true random number generators and random oracles. A PUF designer is
interested in the behavior of an entire population of unique chips,
not just in the behavior of a single chip. This requires quality
metrics, a way to distinguish good designs from bad designs. The talk
will show how we defined PUF quality metrics by measuring and
analyzing a large amount of Field Programmable Gate Array chips.
A second aspect of quality-control is the behavior of degraded, old
PUFs. The aging process causes irreversible changes in a PUF which
affect its performance and reliability as a device-unique function.
The talk demonstrates of we experimentally evaluated and quantified
the effect of PUF aging.
We will conclude by discussing some of the present and future
application domains for PUFs, and demonstrate our efforts in this


Patrick Schaumont is Associate Professor in the Bradley Department of
Electrical and Computer Engineering at Virginia Tech. He obtained the
PhD degree in Electrical Engineering from UCLA in 2004, and the MS
degree in Computer Science from Ghent University, Belgium in 1990. His
research interests are in design methods and design of secure embedded
systems, resource-constrained devices that require trustworthy
His research is supported through NSF and NIST. He has served on the
TPC of international conferences in this field including CHES, DATE,
DAC, HOST. He has served as guest editor for IEEE D&T, ACM TRETS, IEEE
TCAD, and he is serving as associate editor for the Journal of
Cryptographic Engineering. He wrote a textbook on hardware-software
codesign, is listed as inventor on 4 patents, and co-authored over 100
peer-reviewed articles.

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