FPGA researchers are frequently sidetracked by tool and infrastructure needs while pursuing unique novel work, and often resort to using simplified device models for lack of real architectural data. I will present and describe Torc, an open-source C++ infrastructure and tool set for reconfigurable computing, suitable for custom research applications, CAD tool development, and architecture exploration. Torc can manipulate generic netlists (EDIF and structural Verilog) and physically mapped netlists (Xilinx XDL). It provides exhaustive wiring and logic information for 177 Xilinx devices in a dozen families, and can manipulate bitstream files in limited fashion. Torc also provides placing and routing tools for full or partial designs. Recent work includes the partial ability to generate bitstream information without the need for proprietary reverse-engineering or data. That capability is presently being integrated into Torc and will be embedded inside a development board in support of autonomous systems.
Dr. Neil Steiner is a researcher with the Fine-Grained Computing Group at ISI, the University of Southern California's Information Sciences Institute. He has extensive experience with FPGA architectures, bitstreams, and tools, and with autonomous computing systems. He also has a longstanding interest in the interaction of matter, energy, and information at a fundamental physical level. Neil has 12 publications in the field, and is the principal architect of Torc. He received his PhD and MS degrees in Electrical Engineering from Virginia Tech and his BS degree from Illinois Institute of Technology.
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